Job Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products.

Qualcomm Hardware

Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

- IR SignoffCPU/high performance cores
- Signal EM Power EM Signoff for Chip TOP level Block level CPU/DSP and other HMs
- Development of PG Grid spec for different HM




- Validating the PG Grid using Grid Resistance Secondary PG Resistance Checks
- Validating the IR Drops using Static IR , Dynamic IR Vless VCD Checks for validating Die Pkg Components of IR Drops.
- Experience in IO, Bump planning and RDL routing Strategy.
- Working with SOC and Packaging Teams on Bumps Assignments / RDL Enablement / Pkg Routing Optimizations to improve overall PDN Design.
- Partnering withEDA tool vendorsand internal CAD teams to develop and enhanceautomation flows and methodologiesfor improving design efficiency.
- Valuable knowledge on PD would is desirable.
- Python , Perl , TCL.

Skill Set

- Hands on experience in PDN Signoff using Redhawk / RHSC / Voltus at block level / SOC Level.
- Good understanding on Power Integrity Signoff Checks.
- Proficient in scripting languages (Tcl and Perl).
- Familiarity with Innovus for RDL / Bump Planning/PG eco.
- Ability to communicate effectively with multiple global cross-functional teams.
- Tools : Redhawk , Redhawk_SC andbasic use case of Innovus/ Fusion Compiler
- Power Planning/Floorplanning ,Physical Verification hands on experience is added advantage.
- LSF /compute optimization understanding.

Education

- Bachelors - Electronics Engineering

Work Experience

- Years of experience : 4 to 10 years of realavant experience

📌 CPU PDN & EM/IR Sign-Off Engineer (Lead/Staff) (Bengaluru)
🏢 Qualcomm
📍 Bengaluru