Design analysis engineer (Bengaluru)

Design analysis engineer (Bengaluru)

26 Oct
|
Cadence Design Systems (India
|
Bengaluru

26 Oct

Cadence Design Systems (India

Bengaluru

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, creative, and to make an impact.
Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.

The Product Engineer plays a key role in validating, improving and regressing functionality of Tempus product to achieve high quality solution.




Work closely with a group of professionals in R&D;, senior product engineers to define the product specifications and product release teams to enhance the product quality that address the unique and complex needs of Tempus ECO customers and market. Develop product flows to improvequalityand performance. MS in Electrical/Electronics/Computer Engineering with 2+ year experience or BE/BTech in Electrical/Computer/Electronics Engineering with 3 Years relevant experience

REQUIRED EXPERIENCE:

Static Timing Analysis, Signal Integrity, Delay calculation, timing constraints , report_timing commands, timing analysis, Verilog and debug skills
Experience inTiming and power closure with ECO (automated and manual).
Familiar with front-end / back-end design flow knowledge of design
Experience inPhysical Design Implementation platforms likeInnovus or similar tools.
Able to envision the automation requirements and execute it in one of the scripting language likePerl, TCL, Python or C Shell
Knowledge of timing sign off solution experience, at block or full chip level, will be considered as a plus point
Good understanding of scripting language like TCL , perl and shell.
Explore what's possible to get the job done, including creative use of unconventional solutions
Help us solve what others can't.

📌 Design analysis engineer (Bengaluru)
🏢 Cadence Design Systems (India
📍 Bengaluru

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