• Execute and supportDesign-for-Test (DFT) activities including scan insertion, ATPG, and
• OCC integration
• Perform DRC debug, test coverage analysis, and simulation debug across various stages
• of the DFT flow
• Analyse and resolve issues related to testability, fault coverage, and pattern generation
• Work with advanced DFT methodologies including SSN, IJTAG, ICL, and PDL handling
• Collaborate with cross-functional teams to ensure smooth DFT integration and issue
• resolution
• Contribute to continuous improvement of DFT flows, methodologies, and debug
• efficiency and need to have experience with Synopsys tools and MBIST.