Job Description
• Must have a solid understanding of SoC verification flows and experience with SoC verification in multiple clients.
• Should be an independent learner with experience in developing C-based tests for ARC/ARM/RISC-based SoCs.
• Must be an individual contributor capable of managing other CWs.
• Requires a good understanding of SV, UVM test benches, and experience with protocols such as APB, AXI, I2C, UART, PCIe, or DDR.
• Should be able to take the SoC verification test bench and port it for FPGA RTL verification and maintain the test bench for FPGA-RTL.
• Must possess solid debugging skills in SoC Verification.
• Candidates should have 5-8 years of relevant experience.
📌 ASIC/FPGA Design (Bengaluru)
🏢 Source right
📍 Bengaluru
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