Company Description ChipSilica is a specialized engineering company focused on PCIe and related high‑speed interconnect technologies. The team supports customers in developing switches, retimers, and SoCs for PCIe, CXL, UCIe, and other sub‑PCIe related protocols. Applicants joining ChipSilica will work in a domain that demands deep protocol knowledge and performance‑driven design.

The company partners closely with semiconductor and systems organizations to deliver robust, standards‑compliant solutions. For more information about ChipSilica’s services and projects, prospective candidates can contact [email protected].

Role Description This full-time, on-site Rtl Design Engineer role is based in Bengaluru North. The engineer will design and implement RTL blocks for PCIe, CXL, UCIe, and related protocol IPs, ensuring compliance with specifications and performance targets. Daily responsibilities include translating architectural requirements into synthesizable RTL, running simulations and verification tests, and collaborating with verification, physical design, and architecture teams to resolve issues.

The role involves analyzing timing, power, and area metrics, performing design reviews, and optimizing RTL for manufacturability and reliability. The engineer will also contribute to documentation,



support integration into SoCs, and participate in continuous improvement of design flows and methodologies.

Qualifications

- Solid Design Engineering skills with experience in RTL design, digital logic, and hardware architectures.
- Relevant Electrical Engineering knowledge, including digital circuits, high‑speed interfaces, and semiconductor fundamentals.
- Experience with Computer-Aided Design (CAD) tools for RTL development, synthesis, static timing analysis, and simulation.
- Product Design mindset with the ability to translate system requirements into robust, verifiable RTL implementations.
- Optional cross-disciplinary exposure to Mechanical Engineering for enclosure, thermal, or system‑level considerations is beneficial.
- Hands-on experience with PCIe, CXL, UCIe, or similar high‑speed protocol standards is highly preferred.
- Proficiency in HDLs such as Verilog/SystemVerilog, and familiarity with industry‑standard EDA tools.
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a closely related field.
- Ability to work collaboratively in on-site teams, communicate clearly, and document designs and test results effectively.

📌 Senior Design Verification Engineer (Bengaluru)
🏢 ChipSilica
📍 Bengaluru