Hiring | Physical Verification (PV) - Full Chip / SoC Signoff Engineers | 10+ Years | Bangalore & Hyderabad
HCLTech is actively looking for experienced Physical Verification (PV) Engineers with strong expertise in Full Chip Signoff and SoC/Hierarchical SoC Verification.
Experience: 10+ Years
Location: Bangalore / Hyderabad
Mandatory Skills:
Physical Verification (PV)
Full Chip Verification & Signoff
SoC / Hierarchical SoC Verification
PV Signoff Closure
DRC, LVS, ERC, Antenna Checks
Calibre / Synopsys ICV / Cadence Pegasus
Advanced-node signoff experience preferred
What We're Looking For:
Robust understanding of physical verification methodologies
Expertise in signoff flows and tapeout activities
Experience working on complex SoC and Full-Chip designs
Ability to drive signoff closure independently
Interested candidates can share their updated CV along with the below details at [HIDDEN TEXT]
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- Experience in Full Chip Signoff:
- Experience in SoC/Hierarchical SoC:
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