Company Description LeadIC Design Pvt Ltd accelerates semiconductor innovation through full-stack VLSI engineering expertise, supporting the complete chip development lifecycle for global semiconductor companies. Founded in 2018, the company has grown into a trusted partner known for deep technical capability, strong execution ownership, and versatile engagement models. With engineering teams across India and Canada, LeadIC delivers high-quality design services tailored for product-driven teams. Its offerings span custom, memory and analog layout, analog/mixed-signal design, digital design and verification, physical design, STA, DFT, and IP characterization, backed by an engineering culture focused on ownership, quality-driven execution, and long-term technical partnerships that enable silicon success. Role Description This is a full-time Analog Layout Engineer role based in Bengaluru, structured as a hybrid position that combines on-site collaboration with some work-from-home flexibility. The Analog Layout Engineer will be responsible for designing and implementing high-quality analog and mixed-signal layouts, ensuring robust matching, routing, and floorplanning across multiple technology nodes. Day-to-day activities include working closely with circuit designers to interpret schematics, optimizing layouts for performance, area, and reliability, and running physical verification flows to meet DRC, LVS, and other signoff requirements.



The role also involves collaborating with cross-functional teams, reviewing peer layouts, documenting best practices, and contributing to continuous improvement of layout methodologies and automation. Qualifications
• Strong expertise in layout design, including transistor-level layout, floorplanning, matching techniques, and routing optimization.
• Hands-on experience with circuit design and analog/analog circuits, with the ability to understand schematics and translate them into robust layouts.
• Proficiency in physical verification flows, including DRC, LVS, ERC, and reliability checks using industry-standard EDA tools.
• 5+ years of experience as an Analog Layout Engineer or in a closely related VLSI layout role, preferably in advanced technology nodes.
• Practical experience with tools such as Cadence Virtuoso, Mentor/Siemens Calibre, Synopsys tools, or equivalent layout and verification platforms.
• Solid understanding of semiconductor device physics, process design rules, parasitics, and layout-dependent effects impacting analog performance.
• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a related discipline.
• Ability to work in a hybrid environment in Bengaluru, collaborating effectively with global teams, demonstrating ownership, clear communication, and attention to detail.

📌 Analog Layout Engineer with 5+ Years of experience for Bangalore Location (Bengaluru)
🏢 leadIC Design
📍 Bengaluru