Hi ALL,
Greetings from ElevarSoC...
We are hiring for HW DFT Engineer with 4+Years of Experience for Bangalore location.
Notice Period : Immediate / 2 weeks preferred*
#Below the jd
Job Function
3-5 years of experience with Good DFT concepts in SCAN, ATPG and Simulations.
Positive exposure to Synth, ATPG tools (Mentor) : DRC & coverage analysis, Timing/no timing (VCS) simulations.
Anyone already worked for Qcomm/product company is preferable.
Candidate should be independent in handling the given task.
Mandatory Skills
ATPG trace (DRC), Stuck at and TDF Coverage Analysis
ATPG no timing and timing vector simulations
Apply Now!!!
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📌 Design for Testibility (Bengaluru)
🏢 ElevarSoC Technologies
📍 Bengaluru