SmartSoC Solutions Pvt. Ltd. is looking for talented Memory Layout Engineers to join our semiconductor design team. ?
Location:
Bangalore ?
Experience:
3-8 Years ⏳ Notice Period: Immediate to 30 Days preferred ? Key
Skills:
• Solid experience in Memory Layout / Custom Layout
• Hands-on experience with Cadence Virtuoso
• Good knowledge of DRC, LVS, ERC & EM/IR
• Experience in Full-Custom Layout
• Exposure to Memory IPs / SRAM / ROM / Analog Blocks
• Knowledge of advanced technology nodes is an added advantage ? Interested candidates can share their updated resumes at [email protected] Qualification: B.
E./B.
Tech/M.
E./M.
Tech – ECE / VLSI / Electronics