Engineering Group, Engineering Group > Hardware Engineering
General Summary
Minimum exp level should be 6+ years in IP level verification
Good in SystemVerilog and UVM concept
Should have positive understanding and hands-on experience in developing testbenches from scratch and be aware of all TB workplace concepts
Should be good at debugging designs by using the VCS tool
Valuable understanding of digital and Verilog concepts
Preferable to have experience in security-related IP like cryptography and PRNG and RSA algorithms
Preferable to have understanding of the SiFive RISC processor
Good understanding of basic bus protocols like AHB/AXI/APB
Good understanding of functional/code coverage
Good to have formal tool knowledge either VCF or Jasper Gold
Minimum Qualifications
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
📌 Ip Verification Lead Engineer, Sr Bengaluru (India)
🏢 Qualcomm
📍 India
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