Experience:
5–10 years
• Notice Period: 15 to 30 days
•
Location:
Bangalore Role and
Responsibilities:
• Person will be responsible for scan insertion, stuck_at & at-speed ATPG, scan simulations and post silicon debugging for hierarchical design.
• Skill
Requirements:
Person should have good hands-on experience in SCAN, ATPG , Scan pattern verification and also should have good understanding of scan constraints.
• Positive to have: Knowledge of MBIST