Location:
Bengaluru | ? Exp: 8+ Years? ACL Digital is hiring a Physical Design Lead for block/top-level execution on 7nm / 5nm / 3nm nodes. Mandatory Requirement:Cadence Toolchain Expertise: Strong hands-on experience in Innovus (Pamp;R) amp; Tempus (STA) is mandatory.
Key Responsibilities
amp;
Requirements:
Lead full ASIC PD flow: Floorplanning, Power Grid, CTS, Timing Closure, and Sign-off (GDSII).
Drive MMMC STA, SI/crosstalk analysis, and ECO generation.
Ensure zero DRC/LVS/DFM errors using Calibre / Pegasus.
Solid TCL/Perl/Python scripting for flow automation.
B.
Tech / M.
Tech in ECE, EEE, or VLSI.
📌 Physical Design Lead (Bengaluru)
🏢 ACL Digital
📍 Bengaluru
Reply to this offer
Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.