Design Verification Engineer Pcie Bengaluru

Design Verification Engineer Pcie Bengaluru

29 Oct
|
F. Robin Technologies
|
Bengaluru

29 Oct

F. Robin Technologies

Bengaluru

Hiring: Senior DV PCIe Verification Engineer

Location: Bengaluru
Experience: 8+ Years

Immediate Joiners Only

Mandatory Skills:
Solid expertise in SystemVerilog and UVM
Hands-on experience in PCIe Gen3/Gen4/Gen5/Gen6 verification
Expertise in IP, Subsystem, and SoC-level verification
Experience in SVA, constrained-random testing, scoreboards, and coverage closure
Proficiency in VCS/Xcelium/Questa and Python scripting

Positive to Have: CXL, AXI, Formal Verification, and GLS.

Pay: ₹500,000.00 - ₹4,000,000.00 per year

Work Location: In person

📌 Design Verification Engineer Pcie Bengaluru
🏢 F. Robin Technologies
📍 Bengaluru

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