About NovaRays Semi

NovaRays Semi is a Bengaluru-based Analog and Mixed-Signal IP design services company founded by semiconductor industry veterans. We serve semiconductor companies, fabless chip designers and integrated device manufacturers worldwide, and we are building our engineering team from the ground up.

Position Overview

NovaRays Semi is seeking a highly motivated Design Verification Lead to contribute to the development and delivery of world-class Analog IPs for leading semiconductor customers.

Verification Environments

- Digital interface: functional verification in a UVM environment
- Analog domain: AMS (analog mixed-signal) verification of analog PHY such as PCIe, UCIe and DDR
- You may work in one or both environments

Key Responsibilities

- Define analog IP verification strategy and test plan through specification (A-Spec) document
- Development of testbench, test-bench components for Analog IP Data, Clock and Control Path
- Leading the 4-5 members verification team and verification execution
- Defining and meeting coverage goals (functional, code coverage, and feature coverage), regression, constraint sign offs, gate level Simulation (GLS), power aware simulation
- Resolve issues spanning RTL, AMS model, third party VIPs, firmware
- Evaluating signal and power integrity issues, jitter, BER, and eye diagrams for SerDes




- Collaborate with global design verification teams and other stakeholders
- Verification of high-speed interfaces including SerDes, PCIe, DDR, UCIe

Minimum Qualifications

- Bachelor’s degree in electrical engineering with 5-10 years of experience of Design Verification.
- Experience in Analog IP along with knowledge of industry standard analog IP architecture, and protocols such as PCIe, DDR, UCIe or custom protocols
- Solid understanding of the design and verification life cycle, QOV, and coverage goals
- Hands on verification experience with SystemVerilog, UVM testbench, SVA development.
- Hands on experience with coverage planning, coding and coverage closure.
- Experience in clocking, reset, power-up sequences and power management verification.
- Understanding of low power design verification techniques, link training, equalization is a plus.
- Your commitment to innovating as a team demonstrated excellent communication, technical documentation, and independently driving tasks to completion.

Desired Qualifications

- Experience of verification of complex analog/Digital boundary interface.
- Validation Coverage through AMS, DV, Gate Level Simulation (GLS) and formal verification
- Post-Silicon debug experience

📌 Design Verification Engineer (Bengaluru)
🏢 NovaRays Semi
📍 Bengaluru