Role description :

- Job Description :Title: Assistant Engineer Role and Responsibilities 4 to 5 Years of experience with good knowledge of Design Verification(DV) background. Ability to implement sv//uvm test bench environment, generate stimulus, execute tests and debug through wave debug tools. Experience and valuable knowledge on AMBA is must. Experience on any of Mipi DSI/CSI/HDMI/USB would add more value Skills**

vlsi design,design verification,sv/uvm,test bench, About UST

UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.

📌 Associate Iii - Vlsi (Bengaluru)
🏢 UST
📍 Bengaluru