About the Role : We are looking for an experienced AMS Verification Engineer with strong expertise in analog and mixed-signal verification, SystemVerilog, UVM, and real-number modeling (RNM). The candidate will be responsible for verification activities for mixed-signal IPs and ensure functional correctness through simulation, testbench development, and coverage closure.Key Responsibilities : - End-to-end verification of analog and mixed-signal IPs.- Develop verification plans, test strategies, and testbenches for AMS designs.- Build and maintain SystemVerilog/UVM-based verification environments.- Develop and verify real-number models (RNM) for analog blocks.- Verify interactions between analog and digital components.- Perform functional coverage analysis, debug failures, and drive coverage closure.- Collaborate with analog design, digital design, and SoC verification teams.- Manage verification schedules, technical deliverables, and team coordination.- Support regression execution and verification sign-off.Required Skills :
- Robust experience in Analog/Mixed-Signal (AMS) verification.- Hands-on expertise in SystemVerilog and UVM.- Experience with Real Number Modeling (RNM) and mixed-signal verification methodologies.- Knowledge of analog blocks such as ADCs, DACs, PLLs, oscillators, LDOs, and other mixed-signal IPs.- Experience with functional coverage, debugging, and regression management.- Familiarity with AMS simulation tools and verification flows.- Experience leading verification activities or mentoring verification engineers.Preferred Skills : - Experience with Cadence Virtuoso/AMS Designer or other industry-standard AMS verification tools.- Knowledge of analog behavioral modeling and SystemVerilog-AMS.- Experience in semiconductor IP and SoC verification.- Exposure to verification automation using scripting languages such as Python or TCL. (ref:hirist.tech)