We are looking for a motivated and talented Digital Design Verification Engineer to join our team in creating next-generation Power management solutions.
Job Responsibilities
- Define and own verification plans, methodologies, and coverage strategies for complex SoC designs
- Architect and implement verification environments from scratch and enhance existing frameworks
- Drive block-level, subsystem-level, and full-chip verification
- Build Agents, sequences, drivers, monitors, and scoreboards as part of automation.
- Integrate industry-standard VIPs, create custom transactor.
- Lead end2end verification, including: Gate level simulations and debugs, coverage analysis and closure, regression, triage failures, and ensure quality sign-off
- Mentor junior and mid-level verification engineers
- Act as technical lead or owner for key verification deliverables