- Write physical verification runsets (DRC/LVS/PERC) in Calibre, ICV or Pegasus, and keep the LVS-to-parasitic-extraction flow working smoothly
- Maintain metal R/C extraction runsets, LVS and verification decks, and transistor/device models
- Design and maintain PCells and automation that improve PDK quality and designer productivity
- Build and run QA tests on a Linux-based QA system, then report the results
- Root-cause PDK issues and work with cross-functional teams on current process development
- Integrate EDA tools and flows with the PDK and document its contents
📌 PDK Engineer (Noida)
🏢 UST
📍 Noida
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