Dear VLSI network , # Emulation
- 8+ years of experience. Hands-on experience in Verilog, SystemVerilog, UVM, C/C++, Pythonbased verification
- Experience of working with Zebu, Palladium, Veloce HW platforms
- Experience in Cluster and SoC level verification using Hybrid Simulation and Emulation based methodologies
- Proficiency in scripting languages such as Python, Perl, or TCL to build tools and flows for verification environments
- Experience in architecting and implementing Hybrid Verification infrastructure and executing verification cycle
- Experience in development of Hybrid verification environments from scratch
- Experience in performance verification of complex compute blocks like CPU, GPU or HW Accelerators, Ethernet, PCIe, DDR, HBM etc




- Experience in verification of Data-center applications like Video, AI/ML and Networking designs or integration verification of high-speed interfaces like Ethernet PCIe, DDR, HBM
- Experience with development of fully automated flows and scripts for data exploration, analysis and performance verification on emulator and HW platforms
- Experience with verification of ARM/RISC-V based sub-systems or SoCs
- Experience with revision control systems like Mercurial(Hg), Git or SVN
- Experience with simulators and waveform debugging tools Regards, Sreenath Vijayan [email protected]

📌 Lead Engineer (Bengaluru)
🏢 L&T Technology Services
📍 Bengaluru