FPGA and RTL Design Engineer (Hyderabad)

FPGA and RTL Design Engineer (Hyderabad)

01 Nov
|
Happiest Minds Technologies
|
Hyderabad

01 Nov

Happiest Minds Technologies

Hyderabad

Roles and

Responsibilities:

- Design, develop, test, and verify complex FPGA designs using Verilog or VHDL languages.
- Collaborate with cross-functional teams to integrate FPGA designs into larger systems.
- Perform timing analysis and create test cases to ensure optimal performance of the designed circuits.
- Troubleshoot issues in existing FPGA designs and optimize their functionality. Job

Requirements:

- 5-10 years of experience in FPGA design engineering with expertise in RTL coding (Verilog/VHDL).
- Solid understanding of synthesis tools such as Xilinx Vivado or Altera Quartus.
- Proficiency in creating test cases for verifying FPGA designs against specifications.
- Experience with timing analysis techniques to ensure compliance with industry standards.

📌 FPGA and RTL Design Engineer (Hyderabad)
🏢 Happiest Minds Technologies
📍 Hyderabad

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