- Design and develop physical designs for complex digital circuits using STA (Static Timing Analysis) tools.
- Collaborate with cross-functional teams to ensure successful project delivery, meeting customer requirements and timelines.
- Perform PNR (Performance, Power, and Area) analysis to optimize circuit performance and area usage.
- Develop expertise in floor planning techniques to create efficient chip layouts. Job
Requirements:
- 4-10 years of experience in Physical Design Engineering or related field.
- Robust knowledge of STA tools such as PrimeTime, StarRC, or similar products.
- Experience with PNR analysis using tools like Virtuoso or Custom Compiler II.