Role Description Analog Layout Candidate should work independently on block level and chip level Analog layout design, coordinating with the circuit designer & the project lead. Candidate should have minimum 3+ years of hands-on experience in Analog layout. Custom layout experience in DAC, ADC, Band gap, Regulators, LDOs etc. Expertise on 2nm ,3nm, 5nm,7nm,14nm etc. technology nodes on various analog mixed Single blocks such as PLL, Serdes Etc. Full Understanding of IC fabrication and reliability issues. Full familiarity with Cadence-Virtuoso, PVS, ASSURA and Calibre tools. Outstanding written and verbal communication skills. Skills ADC/DAC, PLL, Citrix Provisioning Services, Analog Layout, Cadence Assura, Calibre, Semiconductor Manufacturing, SerDes

📌 Associate III (Hyderabad)
🏢 UST
📍 Hyderabad