Job highlights

- Expert in RTL design with proficiency in Verilog/VHDL, ARM SoC architecture, ASIC synthesis, Static Timing Analysis, and experience with AMBA Bus protocols
- Execute RTL design and coding, integrate ARM core-based SoCs, perform Lint and CDC analysis, utilize FPGA prototyping, conduct equivalency checking, and collaborate with cross-functional teams

Hi All, Please find the attached JD for RTL Design Engineer.

If you are interested share me your updated Resume to - [email protected]

RTL Design -

Responsibilities:

- Execute RTL design and coding with expert-level proficiency
- Integrate ARM core-based designs into SoCs, ensuring seamless compatibility
- Work with AMBA Bus protocols, including AXI, AHB, APB




- Conduct Lint and CDC analysis for design robustness
- Utilize FPGA-based designs or FPGA prototyping for development
- Apply in-depth knowledge of Verilog/VHDL and ARM SoC architecture
- Perform ASIC synthesis and Static Timing Analysis at an expert level
- Execute equivalency checking to ensure design accuracy
- Collaborate with cross-functional teams to achieve project milestones
- Participate in debugging sessions, provide insights, and maintain effective communication within the team.H

Thanks & Regards, Likitha ch,

Kairos Technology.

📌 Rtl Design Engineer (Pune)
🏢 Kairos Technologies
📍 Pune