Company Description SiMaxTech Pvt Ltd is a fast-growing semiconductor design services company that delivers end-to-end chip solutions to global customers. The organization combines deep expertise across the semiconductor value chain with a focus on high performance, quality, and faster time-to-market. Teams at SiMaxTech work across the full design spectrum, from Analog and RTL Design to Physical Design, Verification, and Embedded Design, on process technologies ranging from mature nodes like 65nm and 40nm to advanced nodes such as 7nm, 5nm, 3nm, and beyond. The company is committed to continuous learning, innovation, and execution excellence, positioning itself as a preferred partner for next-generation semiconductor products. With a customer-centric approach, SiMaxTech emphasizes reliability, scalability, and solid engineering capabilities in delivering high-quality design solutions. Role Description Senior Physical Design Engineers at SiMaxTech will be responsible for leading and executing physical design activities for complex ASICs and SoCs, including floorplanning, placement, clock tree synthesis, routing, and timing closure. They will collaborate closely with RTL, logic design, and verification teams to ensure robust implementation, performance optimization, and adherence to power, area, and timing targets. Daily tasks include running and analyzing STA, power analysis, and DFM checks, driving physical verification sign-off, and resolving design and implementation issues.



The role also involves mentoring junior engineers, contributing to methodology improvements, and supporting projects across multiple technology nodes. This is a full-time, on-site role based in Bengaluru South. Hiring for #PhysicalDesign,

Experience:
5+Years

Location:
Bangalore Notice period: Immediate to 30 days. Qualifications
• Candidates should possess strong skills in Physical Design, including floorplanning, placement, CTS, routing, and timing closure.
• Candidates should possess skills in Physical Verification, covering LVS, DRC, and sign-off checks across advanced and mature technology nodes.
• Candidates should possess skills in Logic Design and Circuit Design, with a solid understanding of digital circuit fundamentals, timing, and power concepts.
• Candidates should possess skills in RTL Design, including familiarity with RTL coding, constraints development, and interaction with front-end design teams.
• Candidates should have experience with industry-standard EDA tools (such as Cadence, Synopsys, or equivalent) and scripting languages (such as Python, Perl, or Tcl).
• Candidates should demonstrate strong problem-solving abilities, attention to detail, and effective collaboration and communication skills.
• A bachelor’s or master’s degree in Electrical Engineering, Electronics, VLSI, or a related field is preferred, along with prior experience in complex ASIC/SoC tape-outs.

📌 Senior Physical Design Engineers (Bengaluru)
🏢 SiMaxTech
📍 Bengaluru