Job Title: Power VCD / Gate-Level Simulation (GLS) Lead

Job Description:

- Lead a team of engineers handling Gate-Level Simulation (GLS) activities across multiple projects.
- Drive functional GLS execution, timing validation, debugging, and signoff readiness.
- Generate and validate power VCD/SAIF files for power analysis and optimization.
- Collaborate with Design, Physical Design (PD), DFT, STA, and Verification teams.
- Identify and resolve functional, timing, reset, clocking, and power-related issues before tapeout.
- Develop GLS methodologies, automation, and best practices.
- Manage project schedules, task prioritization, risk identification, and stakeholder communication.

Required Skills:

- Robust experience in Gate-Level Simulation (GLS) and timing closure.
- Power VCD/SAIF generation and validation.
- SystemVerilog and UVM.
- Python, Tcl, Perl, and Shell scripting.
- Knowledge of Design, PD, DFT, and STA flows.
- Team leadership, project planning, debugging, and cross-functional coordination.

For More Info Pls Contact on (phone hidden) / [email protected]

📌 Power VCD / Gate-Level Simulation (GLS) Lead (Bengaluru)
🏢 Trigent Software
📍 Bengaluru