Your Role and Responsibilities:

We are seeking an experienced IO Design Architecture Expert to define, develop, and document chip-level architecture for high-performance IO bridges-such as PCIe bridges-within server-class processor designs.

- Architect and specify IO subsystem components, with a focus on PCIe and other server-grade IO bridges.
- Develop detailed architectural descriptions, interface definitions, and micro-architecture guidance for implementation teams.
- Collaborate with cross-functional teams to ensure architectural integrity and compliance with industry standards.

Required Education:

Bachelor's Degree

Preferred Education:

Master's Degree

Required Technical and Professional Expertise:

- 15-20 years of strong understanding of major IO and interconnect standards, including PCIe, PCI-X, CXL, and related protocols.
- Proficiency in:
- MSI and LSI interrupt mechanisms
- TCEs (Translation Control Entries)
- DMA ordering rules and transaction flows
- MMIO address mapping and access semantics
- Address Translation Services (ATS)



and related coherency/translation features

- Ability to translate architectural requirements into clear specifications used by design, verification, and firmware teams.
- Proven experience in server-class SoC or IO subsystem design is highly desirable.

Preferred Technical and Qualified Experience:

- Specialized FPGA Knowledge: Experience with field-programmable gate array analysis and design, including use of design entry languages and design automation tools, is beneficial for driving innovation and efficiency in logic design.
- Advanced Static Timing: Deep understanding of static timing and its application in chip logic development can be advantageous in driving business results.
- Front-end Processing Expertise: Familiarity with front-end processing and its role in chip logic development can be valuable in shaping the future of cognitive systems logic design.

Years of Experience:15 - 20

📌 IO Design Architecture Expert (Bengaluru)
🏢 IBM
📍 Bengaluru