Interconnect IP Post-Silicon Debug Engineer

Location:
Bangalore

Experience:
5 years ACL Digital is looking for an experienced Post-Silicon Debug Engineer (5+ Years) in Bangalore to drive silicon enablement and debug for AMD’s scalable Infinity Fabric interconnect across next-gen EPYC, Ryzen, and AI/ML products. What You’ll Do: Partner with architects, DV, and post-silicon teams to validate recent Infinity Fabric features, routing configurations, and system-level test requirements.
Develop debug experiments, triggers, and workarounds to root-cause functional, power, and performance anomalies on silicon.
Collaborate with firmware/software teams to deliver initialization settings and drive Design-for-Debug (DFD) requirements for future microarchitectures. What We’re Looking For: Strong expertise in computer architecture, cache coherency, memory ordering, MMU, and SoC power management.
Hands-on proficiency with Python/C programming, HDLs (Verilog/VHDL), and lab tools (oscilloscopes, logic analyzers). ? Apply Now: Send your updated CV to [email protected]

📌 Senior Post silicon validation (Bengaluru)
🏢 ACL Digital
📍 Bengaluru