We're looking for a Senior / Lead / Staff RTL Design Engineer — a deep-tech semiconductor startup building next-generation silicon products.Why Join?

Get an chance to be a founding member of the team and contribute to building innovative semiconductor products from scratch. Work at the intersection of hardware, AI, neuroscience, and biosignal processing.

About the Role and the Work:

RTL Design & Silicon Development

- Architect, design, and develop digital hardware modules using Verilog/SystemVerilog for next-generation semiconductor products.
- Design and integrate RTL modules for ASIC/FPGA-based systems, focusing on performance, efficiency, and reliability.
- Drive RTL coding, simulation, synthesis, debugging, and design optimization.
- Develop efficient digital logic, data paths, control logic, and timing-critical designs.
- Collaborate closely with verification, firmware, and hardware teams to deliver robust silicon solutions.
- Optimize designs for power, performance, and area (PPA), ensuring high-quality RTL implementation.

What We're Looking For: You've designed and developed digital hardware and understand how to build efficient, reliable,



and performance-optimized RTL designs.

Requirements:

- Minimum of 5+ years of experience in RTL design and digital hardware development.
- Solid proficiency in Verilog/SystemVerilog and digital design fundamentals.
- Hands-on experience with ASIC/FPGA design flows, RTL simulation, synthesis, and debugging.
- Strong understanding of computer architecture, timing concepts, and Clock Domain Crossing (CDC).
- Familiarity with EDA tools such as Synopsys, Cadence, Vivado, or Questa.
- Knowledge of hardware interfaces and protocols such as SPI, I2C, UART, and AXI is an advantage.
- Excellent problem-solving, analytical, and debugging skills.

Educational Requirement: Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, VLSI, or a related field.

Good-to-Have Skills:

- Experience in semiconductor product development and custom silicon design.
- Exposure to advanced digital architectures and timing-critical designs.

Location & Work Mode:

Location: Bangalore

Work Mode: Work from Office (5 Days a Week)

📌 Staff RTL Design Engineer (Bangalore Urban)
🏢 Zyoin Group
📍 Bangalore Urban