05 Nov
|
NXP Semiconductors
|
Pune
05 Nov
NXP Semiconductors
Pune
? We're Hiring | RTL DESIGN Manager/ Director
? Location: Pune
? Experience: 15+ Years
Are you an experienced SoC Architect passionate about building next-generation ARM-based microcontrollers and complex SoC platforms?
We are looking for a Senior SoC Architecture Leader with solid expertise in SoC architecture, RTL design, integration, and low-power design to join our growing team!
? Key Responsibilities:
- Define and drive SoC architecture, including CPU subsystems, interconnects, and memory hierarchy.
- Lead RTL design, verification, synthesis, and SoC integration.
- Hands-on experience in RTL coding, debugging, and design reviews.
- Drive PPA optimization and timing closure.
- Collaborate with cross-functional teams across Synthesis, STA, Physical Design, Package, and Hardware/Software integration.
- Mentor technical teams and establish design best practices.
? Technical Expertise Required:
- 15+ years of experience in SoC Design & Architecture with multiple successful tape-outs.
- Strong expertise in ARM-based microcontrollers and SoC integration.
- Proficiency in Verilog/SystemVerilog, RTL, synthesis, and timing closure.
- Strong understanding of Low Power Design (UPF), AXI, and AHB protocols.
- Experience integrating PCIe controllers and PHY IPs.
- Knowledge of interfaces: SPI, I²C, UART, USB, PCIe, Ethernet, CAN, and eSPI.
- Experience with Flash memory integration and security IPs.
- Familiarity with Analog IPs such as ADC, DAC, PLL, and LDO.
- Exposure to Synopsys and Cadence EDA tools.
? Why Join?
An chance to drive complex SoC architecture, influence critical design decisions, and work with talented engineering teams on advanced semiconductor technologies.
? Interested or know someone who could be a great fit?
Feel free to share your updated resume or refer suitable profiles through DM.
Let's connect!
📌 RTL Design Manager Or Director (Pune)
🏢 NXP Semiconductors
📍 Pune