Core Silicon Validation & Debug Lead

Location: Noida, Bangalore & Chennai

Exp: 7 to 15 years

Role Summary

Lead end-to-end SoC validation from pre-silicon readiness through first-silicon power-on and post-silicon sign-off. Own validation planning, execution, debug, coverage, and issue closure across hardware, firmware, and software.

Key Responsibilities

- Develop validation plans, test content, and coverage for IP, subsystem, and SoC features.
- Execute validation on emulation, FPGA/HAPS, and silicon platforms.
- Drive first-silicon power-on, boot-up, bring-up, and feature enablement.
- Perform post-silicon functional, stress, robustness, and system-level validation.
- Debug issues using logs, traces, JTAG, register/memory dumps, and lab tools.
- Drive root-cause analysis and closure with Design, DV, Firmware, Software, and Platform teams.




- Develop / Enable reusable automation, validation frameworks, and regression suites.

Required Skills

- Strong SoC architecture, boot flow, memory, and peripheral knowledge.
- Experience in pre-silicon, bring-up, and post-silicon validation.
- Hands-on debug using JTAG, emulation, FPGA/HAPS, and silicon lab equipment.
- Proficiency in C/C++, Python, scripting, and test automation.
- Solid debug, triage, and root-cause analysis skills.

Preferred

- Experience with DDR/LPDDR, PCIe, USB, Ethernet, Security, and Low-Power validation.
- Exposure to Linux/U-Boot, firmware, BSPs, and device drivers.
- Technical leadership of validation teams and sign-off activities.

📌 Lead Software Engineer (Noida)
🏢 HCLTech
📍 Noida