Description

We are seeking a skilled Verification Engineer with 5-8 years of experience to join our dynamic team in India. The ideal candidate will have a strong background in digital design verification and will be responsible for ensuring the quality and functionality of our digital products.

Responsibilities

- Develop and implement verification plans and test cases for digital designs.
- Perform functional verification of complex digital systems using SystemVerilog and UVM.
- Collaborate with design engineers to understand design specifications and requirements.
- Identify and debug issues in the design and verification environment.
- Generate and maintain verification documentation and reports.
- Contribute to the continuous improvement of verification methodologies and processes.

Skills and Qualifications





- Bachelor's or Master's degree in Electronics, Computer Engineering, or a related field.
- 5-8 years of experience in verification of digital designs.
- Strong knowledge of SystemVerilog and UVM (Universal Verification Methodology).
- Experience with simulation tools like ModelSim, QuestaSim, or similar.
- Familiarity with scripting languages such as Python or Tcl for automation tasks.
- Understanding of digital design concepts and hardware description languages (HDLs) such as VHDL or Verilog.
- Solid analytical and problem-solving skills, with attention to detail.

📌 Verification Engineer (Bengaluru)
🏢 HR Remedy India
📍 Bengaluru