About the Role

We are hiring a Staff CPU Verification Engineer (5 to 8 years experience) in Bengaluru and Hyderabad to drive the functional verification of next-generation CPU cores and related subsystems. This role requires deep verification expertise across CPU memory and execution blocksspecifically Load Store Unit (LSU), Memory Management Unit (MMU), and Cache subsystemsfor candidates who can join within 0 to 30 days.

Key Responsibilities

- CPU Core &
- Subsystem Verification:

Perform end-to-end functional verification of CPU cores and related subsystems, focusing on LSU, MMU, and Cache blocks.

- Verification Strategy &

- Planning:

Understand and interpret complex microarchitectural specifications to develop comprehensive verification strategies, test plans, and testbenches.

- Testbench &

- Test Case Development:

Build and utilize UVM-based verification environments for coverage-driven verification. Write both directed and constrained-random test cases using SystemVerilog, C, and Assembly.

- Coverage Closure: Analyze functional and code coverage reports and actively drive closing coverage gaps.

- Automation &

- Scripting:

Automate regression suites and verification flows using Python, Perl, or Shell scripts.

- Cross-Functional Collaboration: Collaborate closely with CPU architects and senior design engineers to debug failures and ensure overall design quality and performance targets are met.

- Compliance &

- Standards:





Perform all activities in a safe and responsible manner in support of Environmental, Health, Safety &
- Security (EHS&S;) requirements.

Required Qualifications &

- Mandatory Skills

- Education: Bachelors degree (B.E. / B.Tech) or higher in Electronics, Electrical, Computer Engineering, Computer Science, or a related field.

- Experience: 5 to 8 years of hands-on experience in design verification, with a strong focus on CPU, complex IP, or SoC verification.

- Mandatory Block Expertise: Hands-on verification experience with LSU (Load Store Unit), MMU (Memory Management Unit), and Cache subsystems.

- Methodology &
- Languages:

Strong proficiency in SystemVerilog, UVM, and constrained-random verification methodologies, along with test writing in C and Assembly.

- CPU Architecture &

- Coherency:

Familiarity with standard processor architectures (RISC-V, ARM, or MIPS) and a solid understanding of cache and memory coherency concepts.

- Scripting: Robust scripting and automation skills in Python, Perl, or Shell.

- Soft Skills: Excellent analytical, problem-solving, and written/verbal technical communication skills; self-motivated team player.

Preferred / Good-to-Have Qualifications

- Prior hands-on exposure to RISC-V processor architecture.

- Working knowledge of coherent and standard interconnect protocols such as AXI, ACE, or CHI.

- Experience with FPGA prototyping or hardware emulation platforms.

📌 Staff CPU Verification Engineer (LSU / MMU / Cache) - 5 To 8 Years (Bengaluru)
🏢 Rvega
📍 Bengaluru