Intel's P-Core organization is seeking a highly experienced engineering manager to lead the Memory Execution Unit (MEU) Front-End development team responsible for delivering world-class CPU microarchitecture solutions for next-generation Server and Client products. The manager will own end-to-end execution of the MEU cluster across RTL Design, Design Verification, and Formal Verification, driving feature development from architecture definition through RTL implementation, pre-silicon validation, quality signoff, and silicon readiness. Drive microarchitecture reviews, implementation strategy, verification closure, and quality signoff.

- Ensure delivery of features meeting Power, Performance, Area (PPA), Quality, Reliability, and Security objectives.
- Define execution strategy, milestones, risk mitigation plans, and resource allocation.
- Lead and grow an experienced team of RTL, DV, and Formal Verification engineers and technical leads.
- Drive talent development, mentoring, career growth, retention, and organization health.
- Cross-Functional Collaboration - Partner with Architecture, Design, Validation, Physical Design, DFT, Power, Security, and Product Engineering teams. Drive effective stakeholder management and executive communication.

Quality and Execution Excellence - Deliver predictable execution against major CPU program milestones, bug prevention, early bug interception, coverage closure, and validation quality improvements. Ensure robust pre-silicon quality metrics and risk-based signoff methodology. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 15+ years of industry experience,



or Master's degree with 12+ years of experience.

- 5+ years of engineering management experience leading senior technical teams.
- Strong expertise in CPU microarchitecture, RTL design, verification methodologies, and formal verification.
- Proven experience delivering complex SoC/CPU products from definition through silicon.
- Experience leading large Front-End CPU organizations spanning RTL, DV, and Formal Verification.
- Expertise in Out-of-Order CPUs, Memory Subsystems, Cache Coherency, or Execution Units.
- Strong understanding of performance, power, security, and quality tradeoffs.
- Experience driving AI/ML-based validation methodologies and automation initiatives.
- Proven track record of building high-performing organizations and developing future leaders.
- Robust executive communication and stakeholder management skills.

Experienced Hire

Shift:
Shift 1 (India)

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.

📌 Design Manager (Hybrid) (Bengaluru)
🏢 Intel
📍 Bengaluru