About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our [website]( and [Glassdoor]( pages.

In this critical role, you will take ownership of static low power checks and formal verification flows for our advanced, high-performance design blocks and sub-systems. You will partner closely with Physical Design and Power teams to ensure robust power intent implementation and flawless logical equivalence throughout the RTL-to-GDSII flow, including executing complex, late-stage engineering changes (ECOs).

UPF Implementation & Automation: Deploy, optimize, and maintain Unified Power Format (UPF)



coding and verification flows, collaborating with architecture and methodology teams to ensure alignment with platform standards.

Apply your understanding of Physical Design constraints and power architectures to debug violations and provide optimal, implementable UPF and equivalence solutions alongside backend teams.

Education & Experience: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with 3+ years of relevant industry experience in ASIC/SoC design and verification.

Strong, practical experience coding, debugging, and maintaining power intent using the Unified Power Format (UPF).

Hands-on experience with Logical Equivalence Checking (LEC) and Formal Equivalence tools (e.g., Synopsys Formality), including experience implementing and verifying formal ECO flows.

Physical Design Foundation: Solid foundational knowledge of the backend Physical Design (PD) flow, enabling you to anticipate implementation challenges and bridge the gap between frontend intent and backend realization.

Scripting & Automation: Robust scripting proficiency (Tcl, Python, or Perl) to drive flow automation, parse log files, and implement methodology improvements.

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

We celebrate diversity and are committed to creating an inclusive environment for all employees.

📌 Senior Power/Hardware Engineer (Bengaluru)
🏢 SiFive
📍 Bengaluru