We are looking for an experienced Analog Design Lead with robust expertise in Power Management IC (PMIC) Design and proven track record in advanced technology nodes (28nm and below / higher nodes experience preferred). The candidate will lead analog/mixed-signal design activities from architecture definition through silicon validation for next-generation power management solutions.

Key Responsibilities
Lead design and development of Analog/Mixed-Signal IPs for PMIC products.
Define architecture, circuit design, simulation, verification, and silicon bring-up.
Design blocks such as LDOs, Bandgap References, Buck/Boost Converters, Charge Pumps, Current References, Comparators, ADC/DACs, and Protection Circuits.
Drive design reviews, mentor engineers, and collaborate with Layout, Verification, Product, and System teams.
Ensure performance, PPA optimization, reliability, and first-pass silicon success.

Required Skills
Robust expertise in PMIC Analog Design.
Hands-on experience in 28nm or higher nonFinFET or other advanced technology nodes.
Solid understanding of analog design fundamentals, transistor-level design, noise, stability, compensation techniques,



and low-power design.
Experience with Cadence Virtuoso, Spectre, ADE, AMS simulations, and silicon debug.
Proven leadership experience in delivering complex mixed-signal/PMIC projects.

A seasoned technical leader with deep expertise in semiconductor design and development, the Senior Principal Engineer plays a pivotal role in driving innovation across all phases of chip development — from architecture and RTL design to physical implementation, verification, and silicon validation. This role is responsible for setting technical direction on cutting-edge projects, influencing product roadmaps, and ensuring the successful delivery of high-performance, low-power, and cost-effective integrated circuits. Acting as a mentor and technical advisor, the Senior Principal Engineer collaborates with cross-functional teams across architecture, design, verification, DFT, and packaging to push the boundaries of silicon technology while aligning engineering execution with business and product strategies.

📌 : Analog Design Lead: Pmic Kolkata
🏢 Cyient
📍 Kolkata