DFT Engineer (Synopsys Tools)

Location: Bengaluru

Experience: 4 to 10 Years

Domain: VLSI / Semiconductor

Key Responsibilities:

DFT architecture implementation for block-level and SoC designs

Scan insertion, scan stitching, and scan compression

DFT DRC execution and debug

ATPG pattern generation for stuck-at and transition faults

MBIST, JTAG, Boundary Scan, and OCC implementation

Test coverage analysis and DFT sign-off support

Collaboration with RTL, Physical Design, and Silicon Validation teams

Required Skills:

Strong hands-on DFT implementation experience

Scan insertion, scan compression, and ATPG expertise

Synopsys DFT Compiler, TestMAX DFT, TestMAX ATPG / TetraMAX

Stuck-at and Transition Fault Models

Tcl Scripting and Linux/Unix

Significant Note

✅ Immediate joiners 15-20 days only will be considered for all positions.

Are willing to attend Face-to-Face discussions where applicable.

Interested candidates share resume on [email protected] or whatsapp resume on (phone hidden)

📌 DFT Engineer (Synopsys Tools) (Bangalore Metropolitan Area)
🏢 EaseBiz
📍 Bangalore Metropolitan Area