Hiring: RTL Digital Design EngineerLocation: Bengaluru

Experience: 2–3+ Years

Domain: VLSI / Semiconductor

Job DescriptionWe are looking for an RTL Digital Design Engineer to work on design flows and delivery of NOCs.

Key Responsibilities

- Execute and support CDC (Clock Domain Crossing), RTL Lint and Synthesis Elaboration flows.
- Work with Verilog-based RTL designs.
- Analyse and debug CDC and Lint violations.
- Develop and maintain automation scripts using Perl/Python.
- Work in a Unix/Linux setting using Shell scripting.
- Support RTL design flow execution and project deliveries.

Required Skills
- 2–3+ years of relevant industry experience in an EDA company or VLSI design house, after training.




- Strong understanding of Verilog and Digital Design concepts.
- Hands-on experience with CDC and RTL Lint flows.
- Knowledge of Synthesis Elaboration.
- Good logical, analytical and coding skills.
- Proficiency in Perl/Python scripting.
- Familiarity with Unix/Linux and Shell scripting.

Preferred Skills
- Knowledge of AMBA protocols: AXI, AHB and APB.
- Understanding of Clock Domain Crossing and Power Domain Crossings.
- Knowledge of Python or C programming.

Interested candidates can share their updated resumes to [email protected]

📌 RTL Digital Design Engineer (Bengaluru)
🏢 MAXVY Technologies
📍 Bengaluru