Job highlights

- Perform micro-architecture and logic design to deliver maximum throughput,while using minimum power .
- Required Skills: . Strong Verilog RTL coding skills .
- Experience designing ASICs for networking protocols (Ethernet,FCoE) is a plus .

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.

Management Level Definition:

Contributions have visible technical impact on a product or major subcomponent. Applies in-depth professional knowledge and innovative ideas to solve complex problems. Visible contributions improve time-to-market, achieve cost reductions, or satisfy current and future unmet customer needs.

Recognized internal authority on key technology area applying innovative principles and ideas. Provides technical leadership for significant project/program work. Leads or participates in cross-functional initiatives and contributes to mentorship and knowledge sharing across the organization.

What youll do:

Responsibilities:





- Define and architect high-performance blocks for the latest, most advanced networking ASICs
- Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power
- Collaborate with the verification team in the development of the testplan and assist in debugging test failures
- Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes

What you need to bring:

Required Skills:

- Strong Verilog RTL coding skills
- Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable
- Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus
- Knowledge of high performance memory subsystems
- Knowledge of multi-domain clock synchronization and high-speed serial interfaces
- Robust problem solving and ASIC debugging skills
- Excellent written and verbal communications skills
- MSEE or BSEE is required with 8 plus years of experience

Additional Skills: Accountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more}

📌 ASIC Principal Design Engineer (Bengaluru)
🏢 Hewlett Packard Enterprise
📍 Bengaluru