About The Guild

Ethereal Exploration Guild (The Guild) was founded in 2022. It is building Razor Crest Mk-1 (RCM1), the world’s first fully reusable medium-lift launch vehicle, where both stages fly back and fly again.

The team brings more than 350 years of collective space-industry experience and a combined flight heritage of over 75 PSLV and GSLV launches. Most vehicle-critical work is done in-house, including:

- Propulsion: The Guild built India’s first reusable rocket engine. It is also developing a patented full-flow staged-combustion feed cycle, which makes it possible to recover and reuse the upper stage, not just the booster.
- Avionics: the flight computer, engine control units, power systems and GNC are designed in-house.
- Infrastructure: The Guild is building The Anchorage, a 149-acre site at Space City, Andhra Pradesh, about an hour from SDSC SHAR. Engine testing, stage qualification, manufacturing and vehicle integration will all happen there.

Location: Hebbal, Bengaluru

Job-Type: On-site, Monday - Saturday

Role Summary: As an FPGA Engineer, you will take end-to-end ownership of the programmable logic inside our in-house avionics for a fully-reusable, two-stage-to-orbit launch vehicle, from architecture and RTL design through to qualified flight hardware. In a startup setting, you will work across hardware, flight software, and GNC, directly shaping avionics architecture, real-time performance, and flight reliability.

Core Responsibilities:

1/ FPGA Architecture & RTL Design

- Define FPGA architecture for flight computers, data acquisition units, and engine/vehicle control units
- Develop synthesizable RTL in VHDL/Verilog/SystemVerilog for control, timing, and data-handling logic
- Partition functions between FPGA fabric, soft/hard-core processors, and software for latency and determinism
- Own timing closure, resource utilization,



and power budgets across design iterations

2/ High-Speed Interfaces & Data Handling
- Implement sensor and actuator interfaces: ADCs/DACs, IMUs, encoders, PWM, valve and igniter drivers
- Develop avionics bus and communication IP: SpaceWire, MIL-STD-1553, CAN, RS-422/485, Ethernet
- Build high-rate telemetry framing, packetization, and onboard data recording pipelines
- Implement DMA, memory controllers (DDR/SRAM/Flash), and exact time synchronization

3/ Verification & Validation
- Build self-checking testbenches with functional coverage (UVM/OSVVM/cocotb)
- Run simulation, CDC/RDC checks, static timing analysis, and lint on every release
- Validate designs on hardware using integrated logic analyzers and lab test equipment
- Support SIL/HIL campaigns with the GNC and flight software teams

4/ Fault Tolerance & Flight Qualification
- Design for radiation effects: TMR, EDAC/ECC, memory scrubbing, SEU mitigation
- Implement safe-state logic, watchdogs, and redundancy management for flight-critical functions
- Support environmental qualification: vibration, thermal cycling, TVAC, EMI/EMC
- Create design documentation aligned with DO-254/ECSS practices

5/ Board Bring-Up & Integration
- Lead FPGA bring-up on new avionics boards with the hardware team
- Debug integration issues across logic, firmware, and PCB quickly
- Support subsystem, stage, and vehicle test campaigns, including hot fire and flight

6/ Startup Ownership & Cross-Functional Impact
- Operate across boundaries: RTL,



embedded software, hardware, and GNC
- Influence component selection (FPGA families, memories, interfaces) and avionics architecture
- Work directly with propulsion, assembly & integration, test, and safety & reliability teams on flight qualification

Educational Qualifications:

- Bachelor’s or Master’s degree in Electronics & Communication, Electrical Engineering, VLSI, Embedded Systems, or a related field
- Strong fundamentals in digital design, computer architecture, synchronous design, and digital signal processing
- We value hands-on experience more than academic credentials

Required Technical Skills:

1/ Must-Haves

- Strong experience in RTL design and verification, taken through to working hardware
- Deep understanding of:Timing constraints (SDC/XDC), timing closure, and clock domain crossing
- FSM design, pipelining, and fixed-point arithmetic
- Serial and parallel interface protocols
- Ability to debug on real hardware using ILA/SignalTap, oscilloscopes, and logic analyzers

2/ Languages & Tools
- Proficiency in VHDL and/or Verilog/SystemVerilog, Python or TCL for scripting, and C for embedded processor integration
- Experience with Xilinx Vivado, Intel Quartus, or Microchip Libero

3/ Verification
- Hands-on experience with ModelSim/Questa, Vivado Simulator, or an equivalent
- Experience building UVM, OSVVM, or cocotb-based testbenches
- Familiarity with Git and CI-based regression testing

Preferred Skills & Experience:

- 2–5 years in FPGA design for aerospace, defence, space, automotive, or telecom
- Experience with radiation-tolerant FPGAs (Microchip RTG4/PolarFire, AMD space-grade Kintex/Versal/Xilinx Ultrascale+)
- Experience with Zynq/SoC FPGAs and bare-metal or embedded Linux integration
- Exposure to DO-254, ECSS, or MIL-STD avionics standards

📌 FPGA/RTL Design Engineer (Bengaluru)
🏢 Ethereal Exploration Guild
📍 Bengaluru