Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in effective operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Description Staff Engineer, STA – Functional SDC Lead Function: ASIC Design / Physical Design – Signoff |

Location:
[Bangalore] | Reports to: [Manager] Role Summary Own the functional timing constraints (SDC) for advanced-node SoCs, from definition through signoff. You will lead the development, quality and ongoing maintenance of functional-mode constraints, so that STA, synthesis and PD work from complete and correct timing intent. You will work with Architecture, RTL, DFT, CDC/RDC, IP, Physical Design and the SoC Timing Lead.

Key Responsibilities
• Functional SDC ownership:



Develop and maintain top-level and block-level functional constraints. Cover clocks, generated clocks, clock groups, I/O delays, case analysis, and timing exceptions (false and multicycle paths).
• Constraint intent and review: Work with RTL, architecture and IP owners to capture and review clocking and timing intent. Drive constraint sign-off with these teams.
• Constraint quality: Run constraint checks (e.g., missing or conflicting constraints, unconstrained paths, exception validation) and CDC/RDC alignment. Keep functional constraints consistent between synthesis, PD and signoff.
• Mode and hierarchy management: Define functional modes and constraint hierarchy across blocks, subsystems and the full chip. Handle IP and hard-macro constraint integration, and block-to-top constraint propagation.
• Interface and IO constraints: Define timing constraints for high-speed and source-synchronous interfaces (e.g., DDR, PCIe, die-to-die) with IP and PHY teams.
• Debug and closure support: Debug constraint-related timing violations and exception issues, and support convergence with PD and the timing lead.
• Flow and automation: Develop scripts and flows for constraint generation, checking and regression. Maintain checklists and documentation.
• Leadership: Lead and mentor SDC engineers, track schedule and risk, and report status to program and management teams.



Qualifications
• BS/MS in Electrical Engineering or a related field.
• 8+ years in ASIC STA or constraint development, with multiple advanced-node tape-outs.
• Strong command of SDC, clocking architectures, and timing exceptions.
• Experience with hierarchical constraint management and block-to-top propagation.
• Familiarity with CDC/RDC concepts and constraint-checking tools.
• Tools: PrimeTime, Tempus, and constraint-quality tools (e.g., Conformal Constraint Designer, Spyglass or equivalent).
• Scripting in Tcl, Python or Perl.
• Preferred: High-speed interface constraints, multi-voltage (UPF) awareness, and experience leading constraint methodology. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

📌 Staff Engineer, STA – STA Lead (Bengaluru)
🏢 Sandisk
📍 Bengaluru