We are looking for an IP Packaging Engineer with 1–2 years of experience in semiconductor design, verification, IP packaging, or related domains. The candidate will be responsible for packaging, validating, and releasing IP blocks used across chip design projects. The role involves debugging complex design, verification, and build flows while collaborating with cross-functional teams and US-based stakeholders.

Key Responsibilities
Package, validate, and release IP blocks for semiconductor and chip design projects.
Work closely with design, design verification (DV), and build/tooling teams.
Debug complex, multi-component workflows, including IP packaging pipelines, build flows, and DV environments.
Investigate technical failures across tools, scripts, and design/verification flows to identify root causes.
Use Python and Shell scripting for debugging, automation, and troubleshooting.
Document technical findings, issues, and resolutions.
Communicate progress, technical updates, and blockers with US-based teams across time zones.
Support build process improvements and effective IP release activities.

Mandatory Skills




1–2 years of experience in Semiconductor Design, VLSI, Design Verification, IP Packaging, RTL Design or related domains
Understanding of Chip Design Fundamentals, RTL Concepts, Design Verification Basics, Testbenches, Simulation Flows
Hands-on experience in Debugging and Root Cause Analysis, Complex System Troubleshooting, Tool and Script Debugging
Python Scripting, Shell Scripting, Automation and Troubleshooting
Understanding of Design Flows, Verification Flows, IP Packaging Workflows
Strong Analytical and Problem-Solving Skills
Excellent Written and Verbal Communication Skills
Cross-functional Team Collaboration, Global Stakeholder Communication
Willingness to work Full time Onsite at AMD Hyderabad

Valuable-to-Have Skills
Hardware Build Systems, Software Build Systems, Build Orchestration, Dependency Management
CI/CD Pipelines, Build Automation
Hands-on experience with AI/LLM tools, Prompt Engineering, AI Coding Assistants
LLM-based Tool Development, AI-enabled Engineering Workflows

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