Experience: 3+ Years

Domain: VLSI / Semiconductor

Job Location: Bengaluru / Hyderabad /Noida

Employment Type: Full time

Job Overview

We are looking for a skilled Memory Layout Engineer with 3+ years of experience in custom layout design for memory circuits. The ideal candidate should have hands-on experience in physical layout of SRAM/DRAM memory blocks, robust knowledge of analog layout concepts, and proficiency in industry-standard EDA tools.

Key Responsibilities
Design and develop custom layouts for memory blocks such as SRAM, DRAM, Register Files and ROM.
Perform layout activities for memory bitcells, row/column decoders, sense amplifiers, write drivers and peripheral circuits.
Work on full-custom layout design following layout guidelines and design specifications.
Ensure matching, symmetry, parasitic minimization and area optimization.
Perform DRC, LVS and ERC checks and resolve layout-related violations.
Work closely with circuit design, physical verification and characterization teams.
Handle floorplanning, placement and routing of memory macros.
Optimize layouts for performance, power, area (PPA) and signal integrity.




Ensure compliance with foundry-specific design rules and technology requirements.

Required Skills
3+ years of hands-on experience in Custom Layout Design.
Strong experience in Memory Layout – SRAM / DRAM / Register Files / ROM.
Valuable understanding of CMOS fundamentals and analog layout concepts.
Experience in layout of memory bitcells and peripheral circuits.
Hands-on experience with DRC, LVS and physical verification.
Proficiency in Cadence Virtuoso Layout Editor.
Experience with Calibre or equivalent physical verification tools.
Knowledge of FinFET and advanced technology nodes is an added advantage.
Understanding of matching, shielding, guard rings, latch-up prevention and parasitic effects.

Preferred Skills
Experience working on advanced technology nodes (28nm, 16nm, 7nm, 5nm or below).
Exposure to high-density SRAM and memory compiler layouts.
Knowledge of EM/IR and parasitic extraction.
Experience with foundry-specific layout methodologies.

Education

B.E./B.Tech/M.Tech in Electronics, Electrical Engineering, VLSI or a related discipline.

📌 Memory Layout Engineer Bengaluru (India)
🏢 Leadic Design
📍 India