12 Nov
|
leadsoc technologies
|
India
12 Nov
leadsoc technologies
India
Key Responsibilities:
Design and develop SRAM, ROM, Register Files, and other memory IPs.
Work on memory architecture and transistor-level circuit design.
Design memory peripheral circuits such as Sense Amplifiers, Write Drivers, Decoders, and Pre-charge circuits.
Perform circuit simulations, PVT analysis, and Monte Carlo simulations.
Optimize memory designs for Power, Performance, and Area (PPA).
Debug and resolve circuit-level design issues.
Required Skills:
3+ years of hands-on experience in Memory Circuit Design.
Robust knowledge of SRAM architecture and CMOS circuits.
Experience with Cadence Virtuoso.
Proficiency in SPICE tools (Spectre / HSPICE / PrimeSim).
Knowledge of PVT analysis and transistor-level simulations.
Exposure to advanced technology nodes is an added advantage.
📌 Senior Memory Design Engineer Bengaluru (India)
🏢 leadsoc technologies
📍 India