Job Description – Memory Layout Engineer

Experience: 3+ Years

Job Title: Memory Layout Engineer

Employment Type: Full-time

Job Summary

We are looking for a skilled Memory Layout Engineer with 3+ years of experience in custom layout design and implementation of memory circuits. The candidate should have strong knowledge of SRAM/DRAM layout, layout verification, physical verification, and semiconductor design methodologies.

Required Skills
3+ years of experience in Memory Layout Design.
Solid knowledge of SRAM/DRAM layout design.
Experience in FinFET technology and Lower Nodes
Experience in custom analog layout design.
Positive understanding of CMOS fundamentals and semiconductor fabrication processes.
Hands-on experience with DRC, LVS, and PEX.
Knowledge of memory architecture, bit cells, sense amplifiers, and peripheral circuits.
Experience with Cadence Virtuoso and physical verification tools such as Calibre or equivalent.
Valuable debugging and problem-solving skills.

📌 Memory Layout Engineer Bengaluru
🏢 leadsoc technologies
📍 Bengaluru