About Samsung Semiconductor India Research (SSIR) With a wide range of industry-leading semiconductor solutions, we are enabling creative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more. As one of the largest R&D; centres outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products. Roles and Responsibilities
• Technically lead and develop Architectures for Storage IPs meeting market leading KPIs.
• Drive architecture modelling and explorations
• Build architectures for high performance, power optimized design implementations.
• Drive competitive feature and performance analysis and propose leading solutions
• Propose new architectures and frameworks by interfacing across cross-functional teams – Design, Verification, Validation, SoC and FW teams.
• Enable successful implementation and deployment through the design and development phases for storage controller IP's based on NVMe, UFS, and high speed peripheral bus standards such as PCIe and CXL.
• Review and provide documentation, guidelines, Checklists, metrics for IP design , verification, validation, FW teams to ensure successful implementation of the architecture




• Leading by influence having skills to drive high perf team(s). Necessary Skills / Attributes.
• Experience in architecture methodologies/flows , FW/HW co-design
• Experience in developing complex IP/SoC Designs meeting market leading PPA metrics.
• Experience in designing, RTL coding, verification using Verilog /System Verilog/VHDL.
• Expertise in building robust and scalable architecture solutions
- lead the deployment and realization of SoCs.
• Experience in writing functional design doc and/or functional specifications.
• Experience with failure analysis and resolution
• Working experience in collaborations with Verification, SoC integration, FPGA, FW, Physical Design and DFT, test and validation teams
• Desirable skills
• Understanding of storage controller Architectures, Peripherals, Buses/Interconnects and Power Management
• Understanding of Bus Architectures (AXI/AHB), NOC (Network-on-Chip ) and ARM CPU Architectures.
• Understanding of RTL integration , flows and tools
• Experience in synthesis using Synopsys Design Compiler ( DC) and developing timing constraints ( SDC) and Timing analysis.
• Working experience in High speed serial protocols like PCIe, NVMe, UFS Familiarity with FPGA based development
• Contributing into standard bodies and industry forums
• Team player, can-do attitude , Passion for working on cutting edge technologies and ability to debug complex problems. Experience – 15+ Qualifications Mtech/PhD in Electrical/Electronics/Communication and related engineering. Disclaimer Samsung Semiconductor India Research (SSIR), a division of Samsung R&D; India
- Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

📌 RTL technically lead Architecture (Bengaluru)
🏢 Samsung Semiconductor
📍 Bengaluru