Description Invent the Future with Us. Ampere is a semiconductor design company for a new era, leading the future of computing by developing SoCs and platform solutions focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable AI compute for cloud, edge, and physical applications. AI is showing up in essentially every part of the technology landscape, and we’re focused on delivering the performance, efficiency, and reliability those workloads require. Ampere is building compute silicon and platforms for AI applications spanning a broad range of industries. We focus on solving exciting challenges in areas such as robotics and automotive, among others, but the core of our work is enabling efficient AI at scale and across multiple application domains.

About the role
Our Physical Design Implementation Engineer will work with multi-functional global teams to implement Partition/Block level Synthesis, Floorplan, Place and Route, Timing closure, IR/EM and DRC/LVS closure for our next generation highly complex 5nm/3nm/advanced-node Server class Processor products. PD work at Ampere is interesting, challenging, and will expand your professional breadth. We like to bring out the best in people, teach each other, and produce products that have value in the market. In this role, you will be at the forefront of our groundbreaking AI compute solution. Our products combine high-performance general-purpose CPUs with AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. What you’ll achieve:
• As a member of the PD Team,



you will plan and implement a significant portion of the Chip Layout partnering with design and DFT engineering peers.
• You will create solutions to meet challenging frequency, power, area, clocking and design partition goals.
• You’ll get to work with custom and tool-driven CTS and physical design integration methodologies. About you:
• B.
Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience, or M.
Tech with 6+ years of experience.
• Good knowledge of EDA tools from Synopsys or Cadence or Mentor required. In particular experience with PTSI, Innovus, Calibre, StarRC, and Conformal LEC is essential.
• Good knowledge of VLSI process and device characteristics, to make optimal trade-off between performance and power.
• Good understanding of static timing analysis (STA), EM/IR and sign-off flows.
• Expertise in physical design of high frequency chips with emphasis on successful timing closure.
• Good understanding of physical design verification.
• Experience in implementation and design closure with advanced process nodes like 5nm, 3nm etc. Strong hands-on experience with:
• Floor planning, place & route, power and clock distribution, pin placement and timing analysis.
• Timing convergence using high speed design techniques with signal integrity & EM/IR.
• Good scripting skills (perl, python, tcl).
• Self-driven individual and an excellent team player experienced in working with remote teams.




• Must have good communication skills and the ability and desire to work as a team. What we’ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. Benefits highlights include:
• Premium medical, dental, vision insurance, parental advantages includingcrechereimbursement, as well as a retirement plan,so thatyou can feel secure in your health,financial futureand child care during work.
• Generous paid time off policy so that you can embrace a healthy work-life balance
• Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And thereismuch more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us. Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.

📌 Prinicipal Physical Design Engineer (Bengaluru)
🏢 Ampere
📍 Bengaluru