Company: Qualcomm India Private Limited

Job Area: Engineering Group, Engineering Group > Hardware Engineering

Job Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Responsibilities

- Sign-off Ownership:
- Own full-chip and block-level static/dynamic IR drop and signal/power electromigration sign-off.
- Own die plus interposer analysis, die plus interposer plus pkg analysis.
- Should have expertise in handling vector based IR signoff and vector less signoff in different modes
- Drive root-cause debugging for voltage, EM violations and collaborate with physical design (PD) teams on floorplanning and power grid fixes.
- Own power estimation and signoff on Primepower and Joules on different use cases
- Should have knowledge of CPM generation on different use cases




- Understand Mixed signal IP requirements and derive metrics for signoff

- Flow Development:

- Define and maintain robust EMIR methodologies using standard EDA tools like Ansys RedHawk-SC, or Cadence Voltus.
- Work on enhancing flow and methods for faster convergence and covering critical gaps with changing signoff trends.

- Cross functional:

- Support chip-package-system (CPS) integration and work alongside silicon package and interposer teams.
- Work closely with PnR on fixes needed for EMIR violations and left shift strategy for correct by construction methods
- Work with DFT teams to understand impact of DFT strategy on EMIR, assess/fix impact on IR from DFT patterns, provide guidelines for toggling activity in DFT modes, provide power estimation to ATE and board testing teams.
- Work proactively with EDA vendors to get resolution on Tool issues, track critical issues impacting project, initiate and track topics of long term and future interests.
- Work with flow teams to integrate new methods and fixes in to the flow that are impacting ongoing projects. Initiate work flows for long term and future interests.

Qualifications Requirements

- Experience: 5+ years of relevant semiconductor industry experience, with proven background in power integrity sign-off.
- Technical Skills: Advanced expertise in RedHawk_SC, Voltus, PTPX alongside solid scripting proficiency (Python/TCL). Should have deep knowledge in EMIR domain. Should have good knowledge of adjacent domains like STA and inter-operation with those domains.
- Education: Bachelors or Masters degree in Electrical Engineering, VLSI, or a related electronics discipline.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

📌 PDN Engineer (Bengaluru)
🏢 Qualcomm
📍 Bengaluru