Staff Engineer, Design Verification Engineering (Hyderabad)

Staff Engineer, Design Verification Engineering (Hyderabad)

13 Nov
|
Analog Devices
|
Hyderabad

13 Nov

Analog Devices

Hyderabad

Job highlights

- Shift Type: 1st Shift / Days
- Requirements . Electronic Engineering / Computer Engineering degree with 8-12 years of progressive experience in digital design and verification
- Experience on both IP and SoC level verification with knowledge of bringing up gate level simulations
- Experience in Power aware simulations or Formal Verification is desirable

About Analog Devices .

Staff Design Verification Engineer

About the Team The charter of ADI s Consumer Audio team is to develop cutting edge products for hearables, hearing health and prosumer audio end markets. These products and technologies are a key driver of growth in our portable and non-portable consumer business.

Requirements

- Electronic Engineering/Computer Engineering degree with 8-12 years of progressive experience in digital design and verification.
- Should have demonstrated experience in developing UVM-based testbench infrastructure from ground up, functional cover point development, code coverage analysis/closure and assertion development.
- Experience on both IP and SoC level verification with knowledge of bringing up gate level simulations.
- Experience in Power aware simulations or Formal Verification is desirable.
- Proficiency in scripting languages and utilities including Makefile, Python, Perl etc.




- Experience collaborating with product development groups spread across the globe is a must; should have robust interpersonal and communication skills.
- Mentoring junior engineers and leading block or subsystem level verification.

Responsibilities

- Verification of key digital blocks in differentiated mixed signal SOCs targeted for the consumer market
- Complete verification ownership Testbench Architecture, Testplan and Testbench Development, Functional Coverage Closure and Code Coverage Closure
- Usage of industry standard methodologies like UVM and constrained random approach to achieve verification goals
- Actively explore and deploy ML techniques to achieve faster turnaround time
- Debug efficiently and clearly articulate gating issues to engineering leads.
- Integrate the block level testbench at SOC level and verify SOC integration
- Actively participate in post-silicon activities such as silicon bring-up, evaluation support, ATE pattern bring-up to take SoC into production.
- Technically mentor and guide junior verification engineers on SoC Verification.

Additional Qualifications & Experience:

- Digital Signal Processing concepts, and tools such as MATLAB or Octave
- Experience with HW emulation or FPGA prototyping is a plus

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days

📌 Staff Engineer, Design Verification Engineering (Hyderabad)
🏢 Analog Devices
📍 Hyderabad

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