Job highlights

- Experienced with industry-standard DFT / ATPG tools like Synopsys,Cadence. . Proficient in RTL design,CDC,synthesis,and physical design flows.

Job Overview

Join our creative team as a Design-for-Test Manager in Bangalore, where you'll lead efforts to deliver exceptional DFT solutions for complex SoC and ASIC projects. Collaborate across various engineering teams to enhance methodologies and integrate cutting-edge DFT features. Your leadership will drive project success and customer satisfaction in a dynamic, global technology landscape.

Job Designation

Design-for-Test (DFT) Manager

Years of Exp

10+

Job Location

Bangalore

What you'll do

- Lead the DFT team to deliver solutions across multiple ASIC projects.

- Oversee DFT architecture, planning, and verification processes.

- Collaborate with cross-functional teams to ensure smooth DFT integration.

- Review and optimize ATPG/MBIST/LBIST strategies.

- Initiate and drive methodology enhancements and automation.

- Manage project schedules, deliverables, and resources.

- Provide guidance,



mentoring, and feedback to team members.

- Engage with clients on technical discussions and updates.

- Support post-silicon bring-up and pattern debug as needed.

Who you are

- Expert in scan insertion, ATPG, MBIST, and test-mode integration.

- Experienced with industry-standard DFT/ATPG tools like Synopsys, Cadence.

- Proficient in RTL design, CDC, synthesis, and physical design flows.

- Proven leader in managing complex DFT programs.

- Strong problem-solving and communication skills.

- Background in silicon bring-up and production test is advantageous.

- Holds a degree in Electronics, Electrical, VLSI, or a related field.

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Sr. Manager - DFT (Bengaluru)
🏢 TESSOLVE
📍 Bengaluru