This is a great prospect to work as part of a highly regarded team to deliver leading-edge solutions.
Responsibilities
- Performance engineering of the CPU software stack for AMD EPYC server processors: find and fix performance and scalability bottlenecks of C/C applications and libraries on multi-core, multi-node systems (HPC, MPI, data center).
Skills
Must have
- 3-4 years of relevant experience
- C/C development and debugging on multicore systems
- Strong data structures and algorithms
- Performance analysis and optimization of bottlenecks
- Understanding of cache subsystem, ISA and CPU pipeline
- CPU profiling tools
- Experience: 3 to 4 years relevant; onsite in Bangalore 5 days, two F2F rounds on the same day
Nice to have
- HPC / MPI application performance
- x86 or ARM optimization
- Intel MKL, linear algebra, FFT
- x86/ARM assembly
Other
Languages
- English: B2 Upper Intermediate
Seniority
- Regular
Role: Post Silicon Test Engineer,
Industry Type: Legal,
Department: Engineering - Software & QA,
Employment Type: Full Time, Permanent
Role Category: Quality Assurance and Testing
Education
UG: Any Graduate
PG: Any Postgraduate
Key Skills
Skills highlighted with ‘‘ are preferred keyskills algebra algorithmsc developmentcachedata structuresdebugginghpclinear algebranodeperformance analysisperformance engineeringprofiling